LTC3824

Wide Input Range: 4V to 60Vn Current Mode Constant Frequency PWMn Very Low Dropout Operation: 100% Duty Cyclen Programmable Switching Frequency: 200kHz to 600kHzn Selectable High Effi cient Burst Mode® Operation: 40μA Quiescent Currentn Easy Synchronizationn 8V, 2A Gate Drive (VCC > 10V) for Industrial High Voltage P-channel MOSFETn Programmable Soft-Startn Programmable Current Limit

n Available in a Small 10-Pin Thermally EnhancedMSE PackagenLTC3824High Voltage Step-DownController With 40µAQuiescent Current ESCRIPTIOND

The LTC®3824 is a step-down DC/DC controller designed to drive an external P-channel MOSFET. With a wide input range of 4V to 60V and a high voltage gate driver, the LTC3824 is suitable for many industrial and automotive high power applications. Constant frequency current mode operation provides excellent performance. The LTC3824 can be confi gured for Burst Mode operation. Burst Mode operation enhances low current effi ciency (only 40μA quiescent current) and extends battery run time. The switching frequency can be programmed up to 600kHz and is easily synchronizable.Other features include current limit, soft-start, micropower shutdown, and Burst Mode disable. The LTC3824 is available in a 10-lead MSE power package.L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 57319.APPLICATIONS

Industrial and Automotive Power Suppliesn Telecom Power Suppliesn Distributed Power Systems

nTYPICAL APPLICATION

VIN5.5V TO 60V

CIN33μF100V5V/2A Buck Converter+CCAP0.1μFCAPVCCEffi ciency and Power Loss vs Load Current100

EFFICIENCYVIN = 12VVIN = 40V2.5

90EFFICIENCY (%)RS0.025Ω2.0

POWER LOSS (W)SENSELTC3824RSET392kGND100pFSYNC/MODESS0.1μFVC10k3.3nFVFB80.6k 3824 TA01801.5

GATE70

VIN = 40VPOWER LOSSVIN = 12V5010

100

LOAD CURRENT (mA)

1000

1.0

22μHCOUT100μFs2422kVOUT5V2A600.502000

51Ω3824 TA01a

3824fc1

LTC3824ABSOLUTE MAXIMUM RATINGS

(Note 1)PIN CONFIGURATION

TOP VIEW

GND

SYNC/MODE

RSETVCVFB

12345

109876

CAPGATEVCCSENSESS

11

VCC ...........................................................................65VSS, RSET, VFB ..............................................................4VVC ...............................................................................3VSYNC/MODE ...............................................................6VVCC – VSENSE ..............................................................1VMaximum Temperatures (Note 2) LTC3824E .............................................–40°C to 85°C LTC3824I............................................–40°C to 125°CStorage Temperature Range .....................–65° to 150°CLead Temperature (Soldering, 10 sec) ..................300°CMSE PACKAGE

10-LEAD PLASTIC MSOP

TJMAX = 125°C, θJA = 43°C/W, θJC = 3°C/WEXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCBORDER INFORMATION

LEAD FREE FINISHLTC3824EMSE#PBFLTC3824IMSE#PBFLEAD BASED FINISHLTC3824EMSELTC3824IMSETAPE AND REELLTC3824EMSE#TRPBFLTC3824IMSE#TRPBFTAPE AND REELLTC3824EMSE#TRLTC3824IMSE#TRPART MARKINGLTBRZLTCGZPART MARKINGLTBRZLTCGZPACKAGE DESCRIPTION10-Lead Plastic MSOP10-Lead Plastic MSOPPACKAGE DESCRIPTION10-Lead Plastic MSOP10-Lead Plastic MSOPTEMPERATURE RANGE–40°C to 85°C–40°C to 125°CTEMPERATURE RANGE–40°C to 85°C–40°C to 125°CConsult LTC Marketing for parts specifi ed with wider operating temperature ranges.For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/ The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VCC = 12V, RSET = 392k, CCAP = 0.1μF. No load on any outputs, unless otherwise specifi ed.PARAMETERSupply Voltage (VCC)Supply Current (IVCC)Supply Current (IVCC) Burst Mode OperationSupply Current in ShutdownVOLTAGE AMPLIFIER gmReference Voltage (VREF)TransconductanceFB Input CurrentVC HighVC LowVC Source CurrentVC Sink CurrentVC = 0.8V, ΔIVC = ±2μAVFB = VREF (Note 3)IVC = 0IVC = 0VVC = 0.5V to 1.3V, VFB = VREF –100mV (VSYNC = 0V)VVC = 0.7V to 1.3V, VFB = VREF +100mV (VSYNC = 0V)llELECTRICAL CHARACTERISTICS

CONDITIONSMINlTYP0.8407MAX601.365UNITSVmAμAμA4VC ≤ 0.4V (Switching Off), VCC ≤ 60VVSYNC = 0V (Burst Mode Operation Disable)VCC ≤ 60V, SYNC/MODE Open, VC = 0.6VVC ≤ 25mV, VCC ≤ 60V0.7920.7882200.8260101.60.3515150.8080.812370300.5VVμmhonAVVμAμA3824fc2

LTC3824E LECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating PARAMETERVC Threshold for Switching OffSoft-Start Current ISSVC Burst Mode ThresholdVC Burst Mode Threshold HysteresisSENSE Voltage at Burst Mode OperationCurrent Limit Threshold (VCC–VSENSE)FB Overvoltage ThresholdSense Input CurrentOSCILLATORSwitching FrequencySynchronization Pulse Thresholdon SYNC PinSynchronization Frequency RangeVRSETMinimum On-Time (Measured at GATE Pin)Switching Frequency FoldbackGATE DRIVERGATE Bias Voltage (VCC–VCAP)GATE Bias Voltage (VCAP–GND)GATE High Voltage (VCC–VGATE)GATE Peak Source CurrentGATE Low Voltage (VGATE–VCAP)GATE Peak Sink Current9V ≤ VCC ≤ 60V, IGATE = 10mAVCC = 12V, IGATE = 15mA 4V ≤ VCC ≤ 8V, IGATE = 10mA6V ≤ VCC ≤ 8V, IGATE = 15mA, VCC = 12V4V ≤ VCC ≤ 60V, IGATE = –15mACGATE = 10nF8V ≤ VCC ≤ 60V, IGATE = 15mA4V ≤ VCC < 8V, IGATE = 10mACGATE = 10nFlll. No load on any outputs, unless temperature range, otherwise specifi cations are at TA = 25°C. VCC = 12V, RSET = 392k, CCAP = 0.1μFotherwise specifi ed.CONDITIONSVSYNC/MODE = 0V (Note 4)VSS = 0.1V to 1.5VVCC ≤ 60V, VC Rising, SYNC/MODE OpenVCC ≤ 60V(VCC–VSENSE) at 30% Duty Cycle 70% Duty CycleVCC ≤ 60VVC = 1.6VVSENSE = VCCRSET = 392kRSET = 200kRising Edge VSYNCRSET = 392kRSET = 200kRSET = 392k3V Buck Converter Circuit, ILOAD > 2AVFB = 0.3VlllllllMINTYP50.840.043020MAX0.4UNITSVμAVVmVmV8010080.112022304601.3mV%μAkHzkHzVkHzkHzVns1703202004002304601.2350357.06.80.2507.90.850.52.50.10.052.5300600758.81.52.80.80.5kHzVVVVVAVVANote 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: The LTC3824E is guaranteed to meet performance specifi cations from 0°C to 85°C junction temperature. Specifi cations over the –40°C to 85°C temperature range are assured by design characterization and correlation with statistical process controls. The LTC3824I grade is guaranteed over the full –40°C to 125°C operating junction temperature range.Note 3: This parameter is tested in a feedback loop that servos VFB to the reference voltage with the VC pin forced to 1V.Note 4: This specifi cation represents the maximum voltage on VC where switching (GATE pin) is guaranteed to be off.3824fc3

LTC3824TYPICAL PERFORMANCE CHARACTERISTICS

(VCC-VCAP) vs IGATE at VDRIVE Low8.58.48.3VCC-VCAP (V)8.28.18.07.97.87.77.6

0

10

2030

IGATE (mA)

40

50

3824 G01

TA = 25°C unless otherwise noted.Switching Frequency Change vs VCC at RSET = 392kΩ32

ICC vs VCC3

2ICC (mA)VFB = 0.75V1

VFB = 0.85VΔFREQUENCY (kHz)50

60

3824 G02

10–1–2

0

01020

30VCC (V)

40

–3

01020

30VCC (V)

405060

3824 G03

VREF Change vs VCC0.4

700600

0.2

FREQUENCY (kHz)ΔVREF (mV)500

Switching Frequency vs RSET2

ΔVREF vs Temperature1ΔVREF (mV)400

3824 G05

3824 G06

0

400300

0

–0.2

200

–0.4

100100

–1

01020

30VCC (V)

405060

3824 G04

200

RSET(kΩ)

300

–2–40

–20

7502550

DIE TEMPERATURE (°C)

100125

Burst Mode Disabled atILOAD = 200mA, VOUT = 5VILOAD = 200mABurst Mode Operation VOUT = 3VVIN=12V, VOUT= 3V, ILOAD= 200mAVOUT50mV/DIV

VOUT10mV/DIV

INDUCTORCURRENT1A/DIV

INDUCTORCURRENT1A/DIV

4μs/DIV

3824 G10

20μs/DIV

3824 G08

3824fc4

LTC3824TYPICAL PERFORMANCE CHARACTERISTICSTA = 25°C unless otherwise noted.Burst Mode Operation VOUT = 5VVIN=12V, VOUT= 5V, ILOAD= 200mAVOUT50mV/DIV

OUTPUT VOLTAGE

AC COUPLED100mV/DIV

Load Current Step ResponseINDUCTORCURRENT1A/DIVINDUCTORCURRENT2A/DIV

50μs/DIV

3824 G09

100μs/DIV

3824 G10

PIN FUNCTIONS

GND (Pin 1): Chip Ground Pin.SYNC/MODE (Pin 2): Synchronization Input and Burst Mode Operation Enable/Disable. If this pin is left open or pulled higher than 2V, Burst Mode operation will be enabled at light load and the typical threshold of entering Burst Mode operation is one third of current limit. If this pin is grounded or the synchronization pulse is present with a frequency greater than 20kHz then Burst Mode operation is disabled and the LTC3824 goes into pulse skipping at light loads. To synchronize the LTC3824, the duty cycle of the synchronizing pulse can range from 10% to 70% and the synchronizing frequency has to be higher than the programmed frequency. RSET (Pin 3): A resistor from RSET to ground sets the LTC3824 switching frequency. VC (Pin 4): The Output of the voltage error amplifi er gm and the control signal of the current mode PWM control loop. Switching starts at 0.7V, and higher VC corresponds to higher inductor current. When VC is pulled below 25mV, the LTC3824 goes into micropower shutdown.VFB (Pin 5): Error Amplifi er Inverting Input. A resistor divider to this pin sets the output voltage. When VFB is less than 0.5V, the switching frequency will fold back to 50kHz to reduce the minimum on-cycle.SS (Pin 6): Soft-Start Pin. A capacitor on this pin sets the output ramp-up rate. The typical time for SS to reach the programmed level is (C • 0.8V)/7μA.SENSE (Pin 7): Current Sense Input Pin. A sense re-sistor, RS, from VIN to SENSE sets the current limit to 100mV/RS.

VCC (Pin 8): Chip Power Supply. Power supply bypass-ing is required.

GATE (Pin 9): Gate Drive for The External P-channel MOSFET. Typical peak drive current is 2.5A and the drive voltage is clamped to 8V when VCC is higher than 9V.CAP (Pin 10): A Low ESR Capacitor of at Least 0.1μF is required from this pin to VCC to bypass the internal regula-tor for biasing the gate driver circuitry.Exposed Pad (Pin 11): GND. Must be soldered to PCB with expanded metal trace for rated thermal performance.3824fc5

LTC3824BLOCK DIAGRAM

SENSE+1.1VSSVCCBurst ModeDISABLEVINREFERENCEVREFB1GATEQ1CCAP0.1μFLVOUT

RS–1.8V100k2.5V0.3μA8VSYNC/MODE––50pF–+–++M2+Y1QSRY32.5VSLOPECOMPOR1R2R3E1M1CAPD1C2RF1COUT

RF22V1.5VRSETRFREQ0.1V+Burst ModeOPERATIONCONTROL+APPLICATIONS INFORMATION

OperationThe LTC3824 is a constant frequency current mode buck controller with programmable switching frequency up to 600kHz. Referring to the Block Diagram, the LTC3824’s basic functions include a transconductance amplifi er gm to regulate the output voltage and control the current mode PWM current loop, the necessary logic to control the PWM switching cycles, a high speed gate driver to drive an external high power P-channel MOSFET and a voltage regulator to bias the gate driver circuit.In normal operation each switching cycle starts with switch turn-on and the inductor current is sampled through the current sense resistor. This current is amplifi ed and then compared to the error amplifi er output VC to turn the switch off. Voltage loop regulates the output voltage to the programmed level through the output resistor divider and the error amplifi er. Amplifi er E1 regulates the gate drive low to approximately 8V below VCC for VCC higher than 9V, and CCAP stabilizes the voltage. Note that when VCC is lower than 9V, gate drive high will be within 0.5V of VCC and gate drive low within 1V of ground.Important features include shutdown, current limit, soft-start, synchronization and low quiescent current.3824fc6

–GND+PWM++–SHUTDOWNY6+0.025VD6GMD4D7VREF0.8VFB6μ+2.5VVCR12kC1470pFSSCSS0.1μF– 3824 BD–Y250KHz FOLDBACKSYNC DISABLEY5+++OSC+–+0.5VLTC3824APPLICATIONS INFORMATION

Burst Mode OperationThe LTC3824 can be confi gured for Burst Mode operation to enhance light load effi ciency (only 40μA quiescent current) and extend battery run time by leaving the SYNC/MODE pin open or pulling it higher than 2V. In this mode, when output load drops the loop control voltage VC also drops and when VC reaches approximately 0.9V at low duty cycle the LTC3824 goes into sleep mode with the switch turned off. During sleep mode the output voltage drops and VC rises up. When VC goes up to around 70mV the LTC3824 will turn on the switch and the burst cycle repeats. If the SYNC/MODE pin is grounded the Burst Mode operation will be disabled and the LTC3824 skips cycles at light load.Oscillation Frequency Setting and SynchronizationThe switching frequency of the LTC3824 can be set up to 600kHz by a resistor, RFREQ, from the RSET pin to ground.For 200kHz, RFREQ = 392k. See the Switching Frequency vs RFREQ graph in the Typical Performance Characteristics section. With a 100ns one-shot timer on-chip, the LTC3824 provides fl exibility on the sync pulse width. The sync pulse threshold voltage level is about 1.2V.Short-Circuit Protection In normal operation when the output voltage is in regulation, VFB is regulated to 0.8V. If the output is shorted to ground and VFB drops below 0.5V the switching frequency will be reduced to 50kHz to allow the inductor current to discharge and prevent current runaway. Note that synchronization is enabled only when VFB is above 0.5V. Soft-StartDuring soft-start, the voltage on the SS pin (VSS) is the reference voltage that controls the output voltage and the output ramps up following VSS. The effective range of VSS is from 0V to 0.8V. The typical time for the output to reach the programmed level is: tSS=

CSS•0.8V7μA

where CSS is the capacitor connected from the SS pin to GND.Overvoltage ProtectionTo achieve good output regulation in Burst Mode operation, an overvoltage comparator, OVP, with a threshold adap-tive to the VC voltage is used to monitor the FB voltage. In Burst Mode operation with low VC voltage, the OVP threshold is approximately 2% above VREF and the VREF is also shifted lower by 2% to contain the output ripple and to keep output regulation constant. As output load increases, OVP threshold increases with VC voltage to up to 8% above VREF.Undervoltage Lockout and ShutdownThe undervoltage lockout threshold on VCC is 4V. The switch is allowed to turn on only when VCC is higher than 4V. When the VC pin is pulled down below 25mV the LTC3824 goes into micropower shutdown mode and only draws 7μA.Output Voltage ProgrammingWith a 0.8V feedback reference voltage, VREF, the output voltage, VOUT, is programmed by a resistor divider as shown in the Block Diagram. VOUT = 0.8V (1+RF1/RF2)Current Sense Resistor RS and Current LimitThe maximum current the LTC3824 can deliver is deter-mined by: IOUT(MAX) = 100mV/RS – IRIPPLE/2where 100mV is the internal 100mV threshold across VCC and VSENSE, and IRIPPLE is the inductor peak-to-peak ripple current. RS should be placed very close to the power switch with very short traces. Good kelvin sensing is required for accurate current limit.3824fc7

LTC3824APPLICATIONS INFORMATION

Inductor SelectionThe maximum inductor current is determined by :IIL(MAX)=IOUT(MAX)+RIPPLE2(V–V)•DwhereIRIPPLE=INOUTf•LV+VandDutyCycleD=OUTDVIN+VDThe power dissipated by the MOSFET when the LTC3824 is in continuous mode is given by :PMOSFET=

VOUT+VD(IOUT)2(1+δ)RDS(ON)

VIN+VD

2

VD is the catch diode D1 forward voltage and f is the switching frequency.A small inductance will result in larger ripple current, output ripple voltage and also larger inductor core loss. An empirical starting point for the inductor ripple current is about 40% of maximum DC current.L= (VIN–VOUT)•Df•0.4•IOUT(MAX)+ K(VIN)(IOUT)(CRSS)(f)

The fi rst term in the equation represents the I2R losses in the device and the second term is the switching losses. K (estimated as 1.7) is an empirical factor inversely related to the gate drive current and has the unit of 1/Amps. The δ term accounts for the temperature coeffi cient of the RDS(ON) of the MOSFET, which is typically 0.4%/°C. CRSS is the MOSFET reverse transfer capacitance. Figure 1 illustrates the variation of normalized RDS(ON) over temperature for a typical power MOSFET.2.0D NORMALIZED ON-RESISTANCE1.5

The saturation current level of the inductor should be suffi ciently larger than IL(MAX).Power MOSFET SelectionImportant parameters for the power MOSFET include the drain-to-source breakdown voltage (BVDSS), the threshold voltage (VGS(TH)), the on-resistance (RDS(ON)) versus gate-to-source voltage, the gate-to-source and gate-to-drain charges (QGS and QGD, respectively), the maximum drain current (ID(MAX)) and the MOSFET’s thermal resistance (RTH(JC)) and RTH(JA).The gate drive voltage is set by the 8V internal regulator. Consequently, at least 10V VGS rated MOSFETs are required in high voltage applications.In order to calculate the junction temperature of the power MOSFET, the power dissipated by the device must be known. This power dissipation is a function of the duty cycle, the load current and the junction temperature itself (due to the positive temperature coeffi cient of RDS(ON)). The power dissipation calculation should be based on the worst-cast specifi cations for VSENSE(MAX), the required load current at maximum duty cycle, the voltage and temperature ranges, and the RDS(ON) of the MOSFET listed in the data sheet.1.0

0.5

0–50

501000

JUNCTION TEMPERATURE (°C)

150

3824 F01

Figure 1. Normalized RDS(ON) vs TemperatureFrom a known power dissipated in the power MOSFET, its junction temperature can be obtained using the following formula: TJ = TA + PMOSFET • RTH(JA)The RTH(JA) to be used in this equation normally includes the RTH(JC) for the device plus the thermal resistance from the case to the ambient temperature (RTH(CA)). This value of TJ can then be compared to the original assumed value used in the calculation.Output Diode SelectionThe catch diode carries load current during the switch off-time. The average diode current is therefore dependent 3824fc8

LTC3824APPLICATIONS INFORMATION

on the P-channel switch duty cycle. At high input voltages the diode conducts most of the time. As VIN approaches VOUT the diode conducts only a small fraction of the time. The worst condition for the diode is when the output is shorted to ground. Under this condition the diode must safely handle the maximum current at close to 100% of the time. Therefore, the diode must be carefully chosen to meet the worst case voltage and current requirements.Under normal conditions, the average current conducted by the diode is: ID = IOUT • (1 – D)A fast switching Schottky diode must be used to optimize effi ciency. CIN and COUT SelectionA low ESR input capacitor, CIN, sized for the maximum RMS P-channel switch current is required to prevent large input voltage transients. The maximum RMS capacitor current is given by:IRMS=IOUT(MAX) VOUTVINVIN–1VOUTThe output ripple is highest at maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have signifi cantly higher ESR, but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long-term reliability. Ceramic capaci-tors have excellent low ESR characteristics but can have a high voltage coeffi cient and audible noise.Effi ciency ConsiderationsThe effi ciency of a switching regulator is equal to the output power divided by the input power. Percentage effi ciency can be expressed as: % Effi ciency = 100%–(L1 + L2 + L3 +......)where L1, L2, L3...are the individual loss components as a percentage of the input power. It is often useful to analyze individual losses to determine what is limiting the effi ciency and which change would produce the most improvement. Although all dissipative elements in the circuit produce losses, the following are the main sources:1. The supply current into VCC. The VCC current is the sum of the DC supply current and the MOSFET driver and control currents. The DC supply current into the VCC pin is typically about 1mA. The driver current results from switching the gate capacitance of the power MOSFET; this current is typically much larger than the DC current. Each time the MOSFET is switched on and off, a packet of gate charge QG is transferred from the CAP pin to VCC throughout the external bypass capacitor, CCAP. The resulting dQ/dt is a current that must be supplied to the capacitor by the internal regulator. IQ = 1mA + f • QG PIC = VIN • IQ3824fcThis formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even signifi cant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable.The output ripple, ΔVOUT , is determined by:󰀃1󰀆

󰀁VOUT󰀂󰀁IL󰀄ESR+

8fCOUT󰀇󰀅󰀈

9

LTC3824APPLICATIONS INFORMATION

2. Power MOSFET switching and condution losses: V+V

PMOSFET=OUTD(IOUT)2(1+δ)RDS(ON)

VIN+VD

+ K(VIN)2(IOUT)(CRSS)(f)

3. The I2R losses of the current sense resistor: P(SENSE R) = (IOUT)2 • R • D where D is the duty cycle4. The inductor loss due to winding resistance: P(WINDING) = (IOUT)2 • RWP(DIODE) = IOUT • VD • (1–D)5. Loss of the catch diode:6. Other losses, including CIN and COUT ESR dissipation and inductor core losses, generally account for less than 2% of total losses.PCB Layout ConsiderationsTo achieve best performance from a LTC3824 circuit, the PC board layout must be carefully designed. For lower power applications, a 2-layer PC board is suffi cient. However, at higher power levels, a multiple layer PC board is recom-mended. Using a solid ground plane under the circuit is the easiest way to ensure that switching noise does not affect the operation. In order to help dissipate the power from the MOSFET and diode, keep the ground plane on the layers closest to the layers where power components are mounted. Use power planes for the MOSFET and diode in order to improve the spreading of heat from these components into the PCB.For best electrical performance the LTC3824 circuit should be laid out as following:Place all power components in a tight area. This will minimize the size of high current loops. Orient the input and output capacitors and current sense resistor in a way that minimizes the distance between the pads connected to ground plane. Place the LTC3824 and associated components tightly to-gether and next to the section with power components.Use a local via to ground plane for all pads that connect to ground. Use multiple vias for power components.Connect the current sense input directly to the current sense resistor pad. VCC and SENSE are the inputs of the internal current sense amplifi er and should be connected as close to the sense resistor pads as possible. A 100pF capacitor is required across the VCC and sense pins for noise fi ltering and should be placed as close to the pins as possible.Design ExampleAs an example, the LTC3824 is designed for an automotive 5V power supply with the following specifi cations: Maximum IOUT = 2A, typical VIN = 6V to 18V and can reach 60V briefl y during load dump condition, and operating switching frequency = 400kHz.For f = 400kHz, RSET is chosen to be 180k.Allow inductor ripple current to be 0.8A (40% of the maximum output current) at VIN = 18V,L= (18V–5V)5V

=12μH

(400kHz•0.8A)18V COUT will be selected based on the ESR that is required to satisfy the output voltage ripple requirement and the bulk capacitance needed for loop stability. For this design a 220μF tantalum capacitor is used.For worse-case conditions CIN should be rated for at least 1A ripple current (half of the maximum output current). A 47μF tantalum capacitor is adequate.A current limit of 3.3A is selected and RSENSE can be calculated by : RSENSE=

100mV

=0.03󰀁3.3A

and a 25mΩ resistor can be used.3824fc10

LTC3824TYPICAL APPLICATION

12V 2A Buck ConverterVIN

12.5V TO 60V

CIN22.2μF100VCAPCCAP0.1μFCIN1: SANYO 63MV68AXCIN2: TDK C4532X7R2A225MCOUT: SANYO OSCON, 16SP270M, TDKC2012X7RIC105KL1: D104C919AS-330MD1: SS3H9Q1: Si7465DPRS0.025ΩCIN133μF100V+VCC100pFSYNC/MODESENSELTC3824RSET301kGNDGATEQ1L133μH1000pFD168k113k+COUT270μFVOUT12V1μF2A16VX7RSS0.1μFVC15kVFB8.06k 3824 TA021000pFPACKAGE DESCRIPTION

MSE Package10-Lead Plastic MSOP, Exposed Die Pad(Reference LTC DWG # 05-08-16 Rev B)BOTTOM VIEW OF

EXPOSED PAD OPTION

12.06p 0.102(.081p .004)1.83p 0.102(.072p .004)3.00p 0.102(.118p .004)(NOTE 3)2.794p 0.102(.110p .004)0.8p 0.127(.035p .005)1098760.497p 0.076(.0196p .003)REF5.23(.206)MIN2.083p 0.1023.20 – 3.45(.082p .004)(.126 – .136)4.90p 0.152(.193p .006)3.00p 0.102(.118p .004)(NOTE 4)0.500.305p 0.038(.0197)(.0120p .0015)BSCTYP

RECOMMENDED SOLDER PAD LAYOUT

DETAIL “A”0.18(.007)GAUGE PLANE10123450.254(.010)DETAIL “A”

0o – 6o TYPSEATINGPLANE0.53p 0.152(.021p .006)1.10(.043)MAX0.86(.034)REF0.17 – 0.27(.007 – .011)TYPNOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006\") PER SIDE4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006\") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004\") MAX

0.50(.0197)BSC

0.1016p 0.0508(.004p .002)MSOP (MSE) 0307 REV B3824fcInformation furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.11

LTC3824TYPICAL APPLICATION

3V 2A Buck ConverterVIN

4.5V TO 60V

CIN1: SANYO 63MV68AXCIN2: TDK C4532X7R2A225MCOUT: SANYO OSCON, 16SP270M, TDKC2012X7RIC105KL1: D104C919AS-330MD1: SS3H9Q1: Si7465DPRS0.025ΩCIN22.2μF100VCAPCCAP0.1μFVCCCIN133μF100V+100pFSYNC/MODESENSELTC3824RSET301kGNDGATEQ1L133μH100pFD151Ω223k+COUT270μFVOUT3V1μF2A16VSS0.1μFVC15kVFB80.6k 3824 TA02a1000pFRELATED PARTS

PART NUMBERLTC1624LT1976LT3724LTC3703/LTC3703-5LT3800LT3844DESCRIPTION36V Current Mode Controller60V Monolithic Regulator60V Current Mode DC/DC Controller100V and 60V Synchronous Controllers60V Current Mode Step-Down Controller, Synchronous 60V Current Mode Step-Down ControllerCOMMENTS3.5V ≤ VIN ≤ 36V; N-Channel MOSFET; S83.3V ≤ VIN ≤ 60V; 1.5A Peak Switch Current4V ≤ VIN ≤ 60V; 1.223V ≤ VOUT ≤ 36V; 200kHzHigh Effi ciency; Buck or BOOST Topology4V ≤ VIN ≤ 60V; 0.8V ≤ VOUT ≤ 36V; 16-Lead TSSOPSynchronizable, Adjustable Frequency; 4V ≤ VIN ≤ 60V3824fc12

Linear Technology CorporationLT 1008 REV C • PRINTED IN USA

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